Level 3 Online Status Reports

Issue 4
Monday, April 19, 1999

Event Flow

A new library will be created to facilitate communications between Level 3 and the consumer server. The exact form is under discussion.
A weekend wedge test ran for 32 hours without any noticeable problems. The test system included reading out the test wedge and sending data through the DAQ and event builder (using the CDF clock) and Level 3, all the way to the output node. After 32 hours, the events were mangled, but it's not clear at what point, or whether they began life that way. The system, however, operated for another 24 hours, spewing its error messages, before being manually stopped.

Jeff will continue the discussion on the Level 3/Consumer Server interface and work towards an implementation.
Ilya and Christoph will continue investigating long-term tests and their failure modes.
Jeff is to implement Scanner CPU modifications to handle the new command format, as well as another VRB emulator.
Run as large a system as possible and take rate measurements.

Christoph and Andreas have revised the event reformatting and fake data generators.

Perform more sophisticated tests on the reformatter with Andreas's fake data, with CPU profiling.

Ilya has tested C servers in ILU on b0l3pcom1.
Steve has removed debugging material from ILU and found that the library on gobi is reduced from 2.9MB to 700KB. Further reductions are still possible.
ILU requires condition variables, for which there is no VxWorks system implementation. However, implementations do exist.
An IDL outline for "expert" use was shown. It is expected that run control state changes and routien status publications will be done via a publish/subscribe system like DIM.

Michael has produced a first pass on the ROOT I/O, writing CPU load into a ROOT file which can then be read out.
It is decided for now that ROOT-style C++ can be used for monitoring processes as long as they are not in the control path.
Carla Gaspar, one of the DIM authors, found that a select() call in the SIGIO signal handler (in the DIM server code) was not immediately registering the active socket; she has a temporary kludge which waits for a short period of time for the active socket to register.
It is noted that doing anything complicated, especially I/O, in a signal handler is considered a bad idea.

Michael will investigate alternative ROOT I/O schemes.
Andreas and Ilya will evaluate how DIM can be modified in order to wait on select() instead of a signal.
Jeff: l3_converter status.

Purchase orders for PCI-ATM interfaces are already out.
Industrial shelving looks like an inexpensive, scalable solution for installing the farm. The PC farm in Feynman Computing Center was inspected with Don providing narration. Patch panels and trunk cables simplify routing of cables under the floor.
Rob Roser has ordered shelves and related infrastructure, but needs information on patch panels for cabling.
Level 3 farm purchases will stick with BX motherboards and dual 500MHz Pentium III's.
Implementation plan for the PC's is in progress.

Review implementation plan for PC's.
Jeff will talk with Rob about patch panels.
Steve will help fill out orders for ATM switch parts and find out about relevent upgrades.

Jeff Tseng / MIT / jtseng@fnal.gov