TrigMon ReCes Plots

last updated 09/03/03

XCES 4 wire ADC sum distribution and efficiency:


Each Xces bit is toggled on/off based on the ADC sum of 4 specific CES wires being above a threshold. There are 2 trigger thresholds, a low threshold at 1GeV and a high threshold at 2GeV. The black adc sum distribution is determined using the cesd bank and summing the 4 wires associated with each xces bit. The red curve is the adc sum of the 4-wire low threshold xces bits (stored in the TL2D bank). The blue curve is the similar plot for the high threshold bit. The efficiency curve is the red/blue curve divided by the black.

There are errors at low ADC values of order 10-4 associated with both high threshold and low threshold xces bits being toggled on when the adc sum is less than the threshold value. This results in a small overefficiency of the trigger and is on our list to fix, but is at a low priority. The adc sum is a digitized number so in principle, the turnon should be a delta function. The slope of the turnon is due to pedestal shifts of 10-30 counts which are corrected in front end code on event to event basis.

What to Watch for:
Errors at low adc value should not be larger than 10-4.
Missed triggers for either high or low thresholds at ADC sums above threshold resulting in an efficiency less than 99.5%..

TL2D-CESD mismatching2:


This is the 2D eta-phi plot of Xces bits which are toggled "ON" compared to unobserved CES clusters (based on comparisons between the TL2D Xces bits and CESD bank). TrigMon code uses a low CES threshold of 432 ADC cts(1GeV) - 50 ADC cts.(50 cts is pedestal) and a high CES threshold of 913 ADC cts(3GeV) - 50 ADC cts. (The actual hardware high threshold is 672 ADC cts(2GeV).)
The Y axis eta section is defined as follows:
Eta section 0:15 are the xces bits for the west arches,
    0:7 - west arches, CES wires in eta space of 9 - 125 cm
    8:15 - west arches, CES wires in eta space z gt 125 cm eta section 16:31 are the xces bits for the east arches.
    16:23 - east arches, CES wires in eta space 9 - 125 cm
    24:31 - east arches, CES wires in eta space z gt 125 cm


What to Watch for:
These 2 plots should mostly empty. Spotty occupancy will occur due to shifting pedestals. Currently, the high threshold plot will show low occupancy overall because of the difference between the hardware high threshold and what TrigMon is using for hte high threshold. That will get fixed soon.

XCES simulated trigger occupancy:


These plots use the cesd bank to simulate the xces trigger bits and plot the 2d eta/phi distribution of occupancy. TrigMon code uses a low CES threshold of 432 ADC cts(1GeV) - 50 ADC cts.(50 cts is pedestal) and a high CES threshold of 913 ADC cts(3GeV) - 50 ADC cts. (The actual hardware high threshold is 672 ADC cts(2GeV).)
The Y axis eta section is defined as follows:
Eta section 0:15 are the xces bits for the west arches,
    0:7 - west arches, CES wires in eta space of 9 - 125 cm
    8:15 - west arches, CES wires in eta space z gt 125 cm
eta section 16:31 are the xces bits for the east arches.
    16:23 - east arches, CES wires in eta space 9 - 125 cm
    24:31 - east arches, CES wires in eta space z gt 125 cm
Several features are observed in this plot with large statistics: Occupancies are higher in eta space z gt 125 because of the larger sin(theta) angle in particle trajectories. CESD wire cells at detector boundaries are half as large as all other cells so their occupancies are correspondingly smaller. This is observed in xces bits 0,7,8,15,16, 23,24,31.

XCES_trigger_matching:


These plots use the TL2D XCES trigger bits matched to the CES clusters using the CESD data to plot the 2d eta/phi distribution.
The Y axis eta section is defined as follows:
Eta section 0:15 are the xces bits for the west arches,
    0:7 - west arches, CES wires in eta space of 9 - 125 cm
    8:15 - west arches, CES wires in eta space z gt 125 cm
eta section 16:31 are the xces bits for the east arches.
    16:23 - east arches, CES wires in eta space 9 - 125 cm
    24:31 - east arches, CES wires in eta space z gt 125 cm
Several features are observed in this plot with high statistics: Occupancies are higher in eta space z gt 125 because of the larger sin(theta) angle in particle trajectories. CESD wire cells at detector boundaries are half as large as all other cells so their occupancies are correspondingly smaller. This is observed in xces bits 0,7,8,15,16, 23,24,31. West Phi=16 has its voltage lower than all other wedges and so has lower gain.

XCES_trigger_occupancy:


These plots show the 2d eta/phi occupancy distribution of the XCES trigger bits.
The Y axis eta section is defined as follows:
Eta section 0:15 are the xces bits for the west arches,
    0:7 - west arches, CES wires in eta space of 9 - 125 cm
    8:15 - west arches, CES wires in eta space z gt 125 cm
eta section 16:31 are the xces bits for the east arches.
    16:23 - east arches, CES wires in eta space 9- 125 cm
    24:31 - east arches, CES wires in eta space z gt 125 cm
Several features are observed in this plot with large statistics: Occupancies are higher in eta space z gt 125 because of the larger sin(theta) angle in particle trajectories. CESD wire cells at detector boundaries are half as large as all other cells so their occupancies are correspondingly smaller. This is observed in xces bits 0,7,8,15,16, 23,24,31. West Phi=16 has its voltage lower than all other wedges and so has lower gain.

XCES_missing_bit- XCES mismatching:


This is the 2D eta-phi plot of missing Xces bits which correlate with observed CES clusters (based on comparisons between the TL2D Xces bits and CESD bank). TrigMon code uses a low CES threshold of 432 ADC cts(1GeV) - 50 ADC cts.(50 cts is pedestal) and a high CES threshold of 913 ADC cts(3GeV) - 50 ADC cts. (The actual hardware high threshold is 672 ADC cts(2GeV).)
The Y axis eta section is defined as follows:
Eta section 0:15 are the xces bits for the west arches,
    0:7 - west arches, CES wires in eta space of 9 - 125 cm
    8:15 - west arches, CES wires in eta space z gt 125 cm
eta section 16:31 are the xces bits for the east arches.
    16:23 - east arches, CES wires in eta space 9 - 125 cm
    24:31 - east arches, CES wires in eta space z gt 125 cm

What to Watch for:
These 2 plots should be empty. Currently, the low threshold plot will show low occupancy overall because of the difference between the pedestal offset and threshold turnon. We will fix Trigmon code so these plots will be empty unless there are CES clusters associated with missing Xces bits.