AMSRW's ROAD word format

The AMSRW uses the AMS output format when working in compatibility mode with the HB. It use the format described below when it works with the HB++.
Each SVX road is transmitted as a two word packet from the Associative Memory Sequencer Road Warrior (AMSRW) to the Hit Buffer++ (HB++).
The HB++ then sends roads to the Track Fitter (TF) putting in a single packet all hits that belong to a road togheter with the road itself. See Road_Hit packet description.

Word structure

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
HD DS 0 0 Road(21)
HD DS 0 1 0 layermap

Data field assignement:

PHI SVT PHI sector (wedge) in the 0..11 range

The road address itself is the address of a specific pattern inside one AMchip03. While 21 bits are allocated here for a Road Address, the present SVT Associative Memory system (AMSRW + AM++) can only handle up to 19 bits, for a maximum of 2M patterns per wedge. At present we only plan for 512k patterns per wedge, thus there are only 2 AM++ connected to each AMSRW. The leftmost bits of the road address are hardwired to 0 inside the AMSRW.

The pieces of the road address are:
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 AM++(1) LAMB(2) Column(2) AMchip(2) Pattern(12)

AM++AM++ board identifier in 0..1
LAMBLAMB on that AM++ board (4 LAMBs per board)
ColumnColumn on that LAMB (4 columns per LAMB)
AMchipAMchip on that column (4 chips per column)
patternpattern inside that chip (4096 patterns per AMchip)
Please not that LAMB, Column, AMchip identifiers are negated. I.e. LAMB #3 means LAMB #0 in the AM++ board serigraphy.

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