Tuesday, July 22, Notes

Present: Ed Barsotti, Aesook Byon-Wagner, Bob DeMaat, Bob Downing, Luciano
	 Ristori, Keith Schuh, John Wahl, Peter Wilson

John Wahl and Peter Wilson met with the PCBCP to review the DIRAC (Digital
Information Receive And Compare) module and the L1AUX transition module being
developed at the University of Chicago.

The panel was provided with the following documentation:
	DIRAC - The FINAL Specification
	The Anatomy of a DIRAC
	Digital Receive And Compare (DIRAC) Board Startup Timing Diagram
	J3 Backplane and Transition Module (L1AUX) for the Level 1 Calori-
	    meter Trigger Upgrade
	Schematic Diagrams and Assembly Drawings

The DIRAC VMEbus interface will use ABTE devices for the VMEbus buffers. The
DIRAC is a VMEbus A32/D32 slave.  It can be accessed in supervisory and
non-privileged modes. The PLX VME2000 chip is used to implement the VMEbus
interface signals.

The estimated power for the next version of the DIRAC is 6-7 amps at +5 volts.
There are 12 10-bit channels for inputs from ADMEM cards via the L1AUX cards. 
8 bits are input from the tracking trigger on the front panel.
A 16-bit trigger summary and an 8-bit sum Et are sent to the Crates Sum board.
8 EM and 8 hadron triggers on board.

The 12 10-bit values are also passed directly out the front panel to level 2.
These are currently RS-485 but will be changed to LVDS which is pin
compatible.

The board can operate in Run Mode or Load Mode. Load Mode blocks clocks and
allows writes to take place.

For the next version, most EPLD's will be in-system programmable.
Four of the Altera parts have 25-mil contact spacing which makes repair and
replacement of the chips a challenge.

Module ID's must be provided soon.

Stiffeners will be added to the board design as well as ESD strips and
resistors.  The corners will be chamferred.

There will be 96 DIRAC cards in the system.

The DIRAC and the L1AUX transition card operate on +5 volts exclusively.
Ed Barsotti recommends splitting the power plane to distribute +5 volts.

The L1AUX is a transition module which uses LVDS parts. It is expected to draw
3/4 amp at +5 volts.  It converts received from ADMEM cards from differential
to single-ended for DIRAC.

This board is 0.062" thick rather that 0.093" in order to accommodate the
thickness of screw heads on the back of the card which are used to mount
connectors in the middle of the board.

The connector shell will be terminated with an AC connection to ground.
The mounting holes will be plated-through in order to achieve the
electrical connection.

To ensure that the connector shells don't short to the front panel, rubber
gaskets may be used.  Alternatively, the front panel might be fabricated with
FR-4 material.

The next version of the card will have transient suppressors and will go to
a Pico-fuse style of fuse.

The final version of the transition card will have 13 channels. It currently
has 12.  It will included LED's for power and the state of the summing chip.

It is expected that the subracks will consume 800 watts.

The three 50-conductor ribbon cables on the front panel will go to the
crate above.

Keith recommends that we at CDF standardize on the location of pin 1 for
ribbon cable connectors.

Testing & Maintenance
	In place at B0: Load data into ADMEM card diagnostic FIFO and
	drive it through the system. (This can also be done between runs.)
	Alternatively, VME data can be loaded into the pipeline and read
	out via VME at four locations.

	A test stand at Chicago will be used to check out production
	boards.  Broken boards can also be fixed there.
	John has developed a software package for diagnosing the board
	which utilizes multiple boards to conduct a test. 

Keith wonders about cleaning the boards that are loaded with fine-pitch 
surface mount chips in the event of a water leak or smoke damage.  Time is
critical in such a situation.  One approach calls for rinsing the boards
with cooking oil to displace water and thereby reduce the corrosion that
occurs before the final cleaning takes place.
Chicago has had two experiences with water damage at CDF and each time has
utilized the services of a commercial cleaning company in Lombard.

Peter emphasized the need for drip sensors in Run II.  He recommends screens
in parallel which would electrically short together if water were present.
Bob Downing and Ed wonder about how much air flow would be blocked by such
an arrangement.

Keith pointed out that keeping boards clean in Run II could be a problem and
perhaps we should consider pulling the cards and cleaning the dust and dirt off
of them on a regular schedule.  Bob Downing and Peter feel that removing and
reinserting the boards may cause other reliability problems.

Peter and John want to require that the power to a subrack be turned off before
inserting or removing a DIRAC or L1AUX card.  Keith thinks that, since the racks
will have side walls, it may be possible to turn the subracks off independently
without tripping them.  The halon system protect groups of 10 racks.

In a teststand with with only a processor, a mode is available that uses VMEbus
SYSCLK if no other clock is available.  Otherwise, SYSCLK is not required.

If you find inaccuracies (or omissions) you would like to have corrected,
please send comments to Bob DeMaat.   demaat@fnal.gov    fnald::demaat