Thursday, July 24, Notes

Present: Ed Barsotti, Aesook Byon-Wagner, Bob DeMaat, Bob Downing, Nathan Felt,
	 Colin Gay, John Oliver, Keith Schuh

John Oliver, Nathan Felt and Colin Gay met with the PCBCP to review the SRC
(Silicon Readout Controller) which is being developed at Harvard University.
	 
The panel was provided with the following documentation:
	SRC Technical Reference Manual
	Board layout drawing
	Front panel drawing
	Schematic diagrams

The SRC uses a double-wide front panel to accommodate the large connectors.
The shells of some of these connectors are currently not electrically isolated
from the front panel. The next version of the board will use isolated LEMO
connectors.  The style of mounting holes on the pc board will be changed to
ensure that the connector shell is not grounded through the mounting screw.

Ed reports that there is now a double-wide injector/ejector handle available.

Chamfers will be utilized on appropriate corners of the next version of the
printed circuit board.

Electro-Static Discharge (ESD) strips and resistors wil be added to the board.

A mezzanine card with four G-Links will be designed into the next version of
the SRC.  This will probably be oriented vertically near the front panel.

Ed recommends that the LVDS ribbon cable connector be repositioned away from
the center of the board to a location near the front panel in order to shorten
the cable and thus reduce the blockage of the flow of cooling air.

The SRC is expected to draw 2 amps @ +5 volts and currently, with one G-Link,
draws 2 amps @ -5 volts.  With 4 G-Links the current draw is expected to be
7 amps @ -5 volts.

Transorbs are not being used on this prototype.  They will be added to the
next version.

Ed recommends that the designer consider splitting the -5 volt plane in order
to be able to use one 5-amp fuse and one transorb on each of the two portions
of the plane to ensure that the transorb itself would not be damaged while
protecting the card in an over-voltage incident.  Bob Downing points out that
there can be side effects to splitting a power plane.  One could add capacitors
to bridge the gap with an A/C path.  Alternatively, one can consider using a
plane without a split in conjunction with a single 10-amp fuse and two
transorbs in parallel.

Bob Downing recommends using a connector for the mezzanine card that gets the
card up high enough above the main board to allow good air flow between the
two.  Space is available because the front panel is double-wide.  Bob
recommends a height that corresponds to the pitch of single-wide VME modules.

Keith points out that the documentation does not include names of the
knowledgable people who have done the work.  He requests that this
information be added.

Stiffeners will be added to the board.  Nathan will talk to Terri Shaw and Ted
Zmuda about the two designs of stiffeners.

The schematic capture and board layout system that is being used for the
development of the SRC is Accel.

Lock washers and/or Loctite will be added to the mounting screws for the
injector/ ejector handles.

Bob Downing recommends a mechanical connection between the mezzanine card and
the front panel.

Ed recommends adding mechanical locking latches to the D-connector on the front
panel.

A voltage controlled crystal oscillator with an accuracy of 100 ppm is being
used for the G-Link and syncing to Tev clock.

The SRC VMEbus interface is A32/D16.  

Maintenance of the SRC:
A GSTM (General System Test Module) along with a very simple VRB emulator may
be all the special hardware necessary to test the SRC.  Harvard will develop a
specification for a test stand which includes the hardware and software.

There will only be 6 of the SRC modules produced so PREP will not be
supporting them.  Broken cards will have to go back to Harvard for repair.
Keith is willing to try to have as much diagnosing done here at B0 as possible. 

If you find inaccuracies (or omissions) you would like to have corrected,
please send comments to Bob DeMaat.   demaat@fnal.gov    fnald::demaat