28-Jan-99   
							    Kevin Pitts
                                                 

              Tracking Calibration Interface Card Specs                      

Purpose:
 1.   to interface the tracking (COT & muon) tracking calibration
      system to the TSI
 2.   to synchronize the tracking calibration to the CDF_CLOCK


(I list the functionality in terms of the COT.  There would be
separate CICs for the COT and muon systems (multiple boards for 
muon?) but as far as I am aware, the boards can be identical.
Please inform me of any potential differences or other requirements
for the muon system.  Of course, where I list things like "COT_CALIB"
there would be a different set of definitions for "MUON_CALIB", etc.) 

Functionality: 
     The CIC will sit in the first floor calibration VME crate, which
     will also have a TRACER, a Berkeley Nucleonics Delay Generator
     and a calibration fanout board.

     Upon recognition of the COT_CALIB word in the CALIB[6:0] word
     in conjunction with CDF_CALEN*, the CIC board will drive a  
     single ended trigger signal out (I'm going to call it BNC_TRIG 
     for now) the front on a subsequent CDF_CLOCK cycle.


Details:
  1. The CIC will be a 9U VME board and reside in the first floor 
     calibration crate.

  2. Upon delivery of CDF_CALEN* and the CALIB[6:0] word corresponding
     to COT_CALIB, the CIC will generate the trigger (BNC_TRIG) on a 
     subsequent CDF_CLOCK cycle.  

     **Note: we have not yet determined if it will be the "next" clock edge
     or not, but it will definitely be a constant number of clock cycles.

     **Question: Are there multiple modes that we need to run this thing
     in? (i.e. is COT_CALIB a specific word or several words?)

  3. The output of the CIC (BNC_TRIG) will be delivered over a short (1ns) 
     LEMO cable to the BNC pulse generator in an adjacent slot.  The
     pulse generator will be in external trigger mode, with the CIC
     output providing the trigger.

     **Note: we want "low jitter" on this trigger, as in <0.5ns, but it isn't
           yet clear how to best minimize this jitter.  The BNC manual isn't
           much help, so a little more homework is required here.


Additional functionality:
 (this is my list of things that would be nice to have)

  1. A front panel LED which lights for a specified time (~2 sec.?) 
     whenver the a BNC_TRIG is generated.

  2. A second copy of BNC_TRIG. (LEMO connector)
       -This could be used for monitoring and/or triggering multiple
        delay generators (which we would like to do for COT high rate
        tests.)

  3. A single ended copy of the CDF_CLOCK signal. (LEMO connector)
       -There aren't many ways to easily see the clock.  As Andrew 
        points out, we probably want an enable on this line so that
        extraneous clocks aren't bouncing around when you don't need them.
       
  4. An external trigger mode consisting of:
       a. a LEMO input for a single ended trigger 
       b. a switch to enable external trigger mode.
  
       -In external trigger mode, the presence of a trigger would cause
        the PDG trigger to fire on the next CDF_CLOCK cycle.  Note that
        we could run this mode independent of the TSI and DAQ system, but
        we would still require CDF_CLOCK to be present.