Draft Agenda for SVT Workshop
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Time:   Oct 27-28th (Tue, Wed), 1998  9:00-5:00
Place:  University of Chicago
Organizers: S Belforte, R Culbertson, H Frisch, L Ristori, M Shochet
 
 
 
 Tuesday October 27
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 9:00-11:00 Review of boards:
                Overview and SPY system, Pisa volunteer, 15min
                HF, Bill, 15min
                AMS/AM Pisa volunteer, 25min
                HB/Merger/XFF Pisa volunteer, 15min,
                TF, Tsuyoshi, 15min
        Explain the purpose and range of capabilities (such as different modes
        of operation and max clock speed) of each of the boards so everyone
        is familiar with the terminology and some details of what the
        boards can do.
11:00-12:00 Schedule:  Mel/Luciano
        Status of boards and testing - propose new testing and
        production schedule
12:00- 1:00 Lunch
 1:00- 3:00 Vertical Slice Test: Stefano/Henry
        Proposal for location and details of a vertical slice test
        including hardware needs (SVT workstation?), individual and
        integrated online software.  Conversion of online software to
        it's final form.
 3:00- 4:00 Error Handling:  Luciano
        Proposal for the final error handling scheme.  Description of
        registers on each board.  Where will CDF_ERROR be pulled?
        What is the plan for the G-link error?
 4:00- 4:30 Alignment, Pisa volunteer
        Review of the plan for mechanical alignment and confirmation
        that it is adequate
 
 
 Wednesday October 28
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 9:00-12:00 AM Patterns and track fitter details: Giovanni/Tsuyoshi
        Proposal for a nominal set of patterns to loaded in the AM:
        4 out of 5, barrel crossers, superstrips, pt cuts, permutations,
        duplicates(?).  Proposal of a final hardware configuration -
        the talk should cover the extent of the possible ways to use the
        the hardware.
12:00- 1:00 Lunch
 1:00- 3:00 SVT workstation: Xin/Bill/Stefano
        Proposal for the form of the machine that controls the SVT VME
        bus, holds and loads the SVT database, serves as the communication
        link between run control and the SVT, reads out, evaluates and
        stores SPY buffer data.  What is the protocol for talking to Run
        Control, reporting errors?  What operations are done in what priority?
        What operations are done on the SPY buffers and how often?
        Also a proposal for the general plan for downloading constants -
        what is on board/MVME FRAM/on workstation disk/calculated(?).
        Since it is too early to choose an actual platform and database,
        this will necessarily be more general and the proposal may be an
        assignment of responsibilities.
 3:00-4:00 Issues of standardization: All
        Discussion of the standardization (or lack of same) of the front
        panel, the VME interface, chips, details and the look of software,
        and documentation in general.